SoC Verification Professional - System Verilog/UVM/OVM (6-12 Yrs) Bangalore (Semiconductor/VLSI/EDA)

ASIC Verification JD : - Working experience in IP / SoC verification - Should have the expertise to develop block level / system level verification environments using System Verilog and UVM / OVM - Experience to develop BFMs / Checkers / monitors / Scoreboards - Should have developed block/system level verification plans and tests.
-Should have the capability to debug test failures to find the root cause.
-Should have worked on code / functional coverage.
-Experience in constrained random testing is a plus.
-Experience in PCIe / Ethernet / DDR / USB / Bluetooth protocols will be PLUS - Knowledge of scripting languages like Perl, Tcl

Required Skills : English